Digital instrumentation for the measurement of high spectral purity signals

Improvements on electronic technology in recent years have allowed the application of digital techniques in time and frequency metrology where low noise and high accuracy are required, yielding flexibility in systems implementation and setup. This results in measurement systems with extended capabilities, additional functionalities and ease of use. The Analog to Digital Converters (ADCs) and Digital to Analog Converters (DACs), as the system front-end, set the ultimate performance of the system in terms of noise. The noise characterization of these components will allow performing punctual considerations on the study of the implementation feasibility of new techniques and for the selection of proper components according to the application requirements. Moreover, most commercial platforms based on FPGA are clocked by quartz oscillators whose accuracy and frequency stability are not suitable for many time and frequency applications. In this case, it is possible to take advantage of the internal Phase Locked Loop (PLL) for generating the internal clock from an external frequency reference. However, the PLL phase noise could degrade the oscillator stability thereby limiting the entire system performance becoming a critical component for digital instrumentation. The information available currently in literature, describes in depth the features of these devices at frequency offsets far from the carrier. However, the information close to the carrier is a more important concern for time and frequency applications. In this frame, my PhD work is focused on understanding the limitations of the critical blocks of digital instrumentation for time and frequency metrology. The aim is to characterize the noise introduced by these blocks and in this manner to be able to predict their effects on a specific application. This is done by modeling the noise introduced by each component and by describing them in terms of general and technical parameters. The parameters of the models are identified and extracted through the corresponding method proposed accordingly to the component operation. This work was validated by characterizing a commercially available platform, Red Pitaya. This platform is an open source embedded system whose resolution and speed (14 bit, 125 MSps) are reasonably close to the state of the art of ADCs and DACs (16 bit, 350 MSps or 14 bit, 1 GSps/3GSPs) and it is potentially sufficient for the implementation of a complete instrument. The characterization results lead to the noise limitations of the platform and give a guideline for instrumentation design techniques. Based on the results obtained from the noise characterization, the implementation of a digital instrument for frequency transfer using fiber link was performed on the Red Pitaya platform. In this project, a digital implementation for the detection and compensation of the phase noise induced by the fiber is proposed. The beat note, representing the fiber length variations, is acquired directly with a high speed ADC followed by a fully digital phase detector. Based on the characterization results, it was expected a limitation in the phase noise measurement given by the PLL. First measurements of this implementation were performed using the 150 km-long buried fibers, placed in the same cables between INRiM and the Laboratoire Souterrain de Modane (LSM) on the Italy-France border. The two fibers are joined together at LSM to obtain a 300 km loop with both ends at INRiM. From these results the noise introduced by the digital system was verified in agreement with characterization results. Further test and improvements will be performed for having a finished system which is intended to be used on the Italian Link for Frequency and Time from Turin to Florence that is 642-km long and to its extension in the rest of Italy that is foreseen in the next future. Currently, a higher performance platform is under assessment by applying the tools and concepts developed along the PhD. The purpose of this project is the implementation of a state of the art phasemeter whose architecture is based on the DAC. In order to estimate the ultimate performance of the instrument, the DAC characterization is under development and preliminary measurements are also reported here

Mobile robot modelling and autonomous guidance

This paper presents a generic model for a mobile robot with n wheels and active suspension. The model is presented in the fashion of an Embedded Model (EM) in order to apply the control framework known as Embedded Model Control (EMC). EMC is a model based control technique which allows the proper active real-time estimation and rejection of system disturbances. This research constitutes the initial steps for the application of the EMC framework and its future implementation on mobile robotics related problems. A guidance strategy with elliptical trajectories is developed, which guaranties position and attitude constraints. Some simulations are presented at the end showing the capabilities of the model and guidance algorithm built and presented

Digital electronics based on red pitaya platform for coherent fiber links

Recent improvements and continuous research on accurate clocks and frequency standards require the study of suitable tools and techniques for frequency transfer that minimize the added noise and allow fully exploiting these clocks in metrology applications. Different experiments performed during the last decade validated fiber links as the most performing tool for frequency transfer, reaching a statistical uncertainty of 10^-20 for thousands kilometers links. Recently, digital implementations have been used for metrological applications due to the flexibility, cost effective and compact solutions that can be achieved. In this paper, we propose a digital implementation for the detection and compensation of the phase noise induced by the fiber link. The beat note, representing the fiber length variations, is acquired directly with a fast Analog to Digital Converter (ADC) followed by a Tracking Numerical Controlled Oscillator (NCO). This reduces the component’s latency and the communication delay between different blocks, increasing the tracking bandwidth. In addition, we report the characterization of the main components that allows foreseeing which are the limiting aspects and the expected performance of the complete implementation. The proposed system is being implemented on Red Pitaya, an open source platform driven by a Zynq, System on Chip (SoC) of Xilinx that contains a FPGA and an ARM processor embedded on the same chip